QUALCOMM Incorporated today announced that its first chip leveraging 45 nanometer (nm) process technology has taped out. The next milestone in CMOS semiconductor manufacturing, 45 nm technology enables chips that feature higher speeds, lower power consumption and enhanced integration with reduced die cost by providing more die per wafer.
“QUALCOMM's synergistic relationship with strategic foundry partners continues to support our long history of technology innovation as we reach this milestone in leading-edge process technology,” said Behrooz Abdi, senior vice president and general manager for QUALCOMM CDMA Technologies. “We look forward to enabling new classes of products at 45 nanometers and beyond, which will evolve the role of wireless in everyday life to a new level for people around the world.”
QUALCOMM has taped out its product on a low power-optimized 45 nm process that utilizes advanced immersion lithography and very low k inter-metal dielectrics features. The technology provides competitive performance with significant cost efficiency, along with improved performance on leakage and integration. The Company has also begun development work on 40 nm process technology, which is expected to deliver even greater benefits in semiconductor performance, cost and efficiency.
“QUALCOMM's synergistic relationship with strategic foundry partners continues to support our long history of technology innovation as we reach this milestone in leading-edge process technology,” said Behrooz Abdi, senior vice president and general manager for QUALCOMM CDMA Technologies. “We look forward to enabling new classes of products at 45 nanometers and beyond, which will evolve the role of wireless in everyday life to a new level for people around the world.”
QUALCOMM has taped out its product on a low power-optimized 45 nm process that utilizes advanced immersion lithography and very low k inter-metal dielectrics features. The technology provides competitive performance with significant cost efficiency, along with improved performance on leakage and integration. The Company has also begun development work on 40 nm process technology, which is expected to deliver even greater benefits in semiconductor performance, cost and efficiency.
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